IEEE MWSCAS 2019 — A Single-Stage RISC-V Processor to Mitigate the Von Neumann Bottleneck

UNO Laboratories and Hirosaki University presented joint research results at the 62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2019). The paper demonstrated a non-pipelined single-stage RISC-V processor (RV32IM) implemented on Xilinx® Artix®-7 100T FPGA, using the company's own patented architecture. The processor directly reads instructions from memory without latching into the instruction register, enabling efficient single-stage operation comparable to pipelines.

【Update】This was the first public academic presentation of what would become the Trinita® core. UNO labo

IEEE Xplore: https://ieeexplore.ieee.org/abstract/document/8884919
MWSCAS 2019: https://ieeexplore.ieee.org/xpl/conhome/8864534/proceeding


【About the non-pipelined, single-stage RISC-V processor (Trinita®)】
※Trinita® can be used with ISAs other than RISC-V.

Non-pipelined, single-stage RISC-V processor (Trinita®) has a very simple design where the instruction memory (RAM) is directly connected to the decoder (no instruction register required) and an instruction cycle is processed in one stage (one clock).

Although the critical path lengthens as the amount of processing per clock increases, no pipeline-like processing waste occurs during conditional branching or interrupt execution, and the same amount of processing is achieved during normal software execution at about 1/2.5 the operating frequency of a 5-stage pipeline.
※Processing comparable to pipelines with higher operating frequencies at lower frequencies without increasing the operating frequency
⇒ High power efficiency

Another major advantage is that all instructions are executed sequentially in one stage (one clock), so there is no control or data hazard (no branch prediction required), the number of clocks required for processing can be easily determined, and robust multi-core operation is possible while maintaining real-time performance and high power efficiency.

Applications for the power-efficient, single-stage RISC-V processor (Trinita®) include embedding in IoT devices such as sensor nodes and various monitoring devices such as in healthcare that require continuous operation in locations where battery replacement is difficult, as well as edge computing for AI and image processing.