Interface Magazine — Trinita® 1-Stage RISC-V Core Featured in FPGA Magazine Special Edition No.4 Media, EnglishMasami FukushimaFebruary 25, 2025RISC-V, Trinita, FPGA, Media, Interface Magazine
KAGA DEVICES — Trinita® 1-Stage RISC-V Core Power Efficiency Improved: 2.1× (T20) / 1.8× (Ti60) vs. VexRiscv Media, EnglishMasami FukushimaMay 10, 2024RISC-V, RV32IM, Trinita, Kaga Devices, Efinix
Innovations-i Interview — Pursuing the Ultimate Low-Power Single-Stage LSI Media, EnglishMasami FukushimaFebruary 28, 2022RISC-V, FPGA, ASIC, UNO Laboratories, Media
Innovation Business Award 2021 — UNO Laboratories Receives "Yoi Shigoto Okoshi Award" for Energy-Efficient Processor Development Media, EnglishMasami FukushimaDecember 30, 2021UNO Laboratories, Innovation Business Award
MONOist — Non-pipelined Single-Stage RISC-V Processor Doubles FPGA CPU Clock Efficiency Media, EnglishMasami FukushimaMay 17, 2021MONOist, RISC-V, RV32IM, Trinita, media
Press Release — Development of Highly Efficient Single-Stage RISC-V Processor for Energy Harvesting IoT Devices Media, EnglishMasami FukushimaMay 1, 2021Press Release, RISC-V, RV32IM, FPGA, Trinita
